Microelectronic elements such as semiconductor chips commonly are provided with elements which protect the microelectronic element and facilitate its connection to other elements of a larger circuit. For example, a semiconductor chip typically is provided as a small, flat element having oppositely facing front and rear surfaces and contacts exposed at the front surface. The contacts are electrically connected to the numerous electronic circuit elements formed integrally within the chip. Such a chip most commonly is provided in a package having a miniature circuit panel referred to as a package substrate. The chip is typically mounted to the package substrate with the front or rear surface overlying a surface of the package substrate, and the package substrate typically has terminals exposed at a surface of the substrate. The terminals are electrically connected to the contacts of the chip. The package typically also includes some form of covering overlying the chip on the side of the chip opposite from the package substrate. The covering serves to protect the chip and, in some cases, the connections between the chip and the conductive elements of the package substrate. Such a packaged chip can be mounted to a circuit panel such as a circuit board by connecting the terminals of the package substrate to conductive elements such as contact pads on the larger circuit panel.
In certain packages, the chip is mounted with its front or back surface overlying an upper surface of the package substrate, whereas terminals are provided on the oppositely facing lower surface. A mass of a dielectric material overlies the chip and, most typically, the electrical connections between the chip and the conductive elements of the package substrate. The dielectric mass can be formed by molding a flowable dielectric composition around the chip so that the dielectric composition covers the chip and all or part of the top surface of the package substrate. Such a package is commonly referred to as an “overmolded” package, and the mass of dielectric material is referred to as the “overmold.” Overmolded packages are economical to manufacture and thus are widely used.
In some applications, it is desirable to stack chip packages on top of one another, so that plural chips can be provided in the same space on the surface of the larger circuit panel. Certain overmolded packages incorporate stacking contacts exposed at the top surface of the package substrate outside of the area covered by the chip and, typically, outside of the area covered by the overmold. Such packages can be stacked one atop the other with interconnecting elements such as solder balls or other conductive connections extending between the stacking contacts of the lower package and the terminals of the next higher package in the stack. In such an arrangement, all of the packages in the stack are electrically connected to the terminals on package at the bottom of the stack. In such an arrangement, however, all of the interconnecting elements must be accommodated in the limited region of the package substrate outside of the area covered by the overmold. Moreover, because the package substrate of the higher package in the stack sits above the dielectric overmold in the next lower package, there is an appreciable gap in the vertical direction between the terminals of the higher package and the stacking contacts of the lower package. The interconnecting elements must bridge this gap. This typically requires interconnecting elements spaced at relatively large intervals. Therefore, the number of interconnecting elements which can be accommodated using package substrate of a given size is limited.
Despite the considerable effort devoted in the art to development of stackable packages and other packages having top-surface mounting pads, further improvement would be desirable.